An all-mode, bonding pad-oriented ESD (electrostatic discharge) protection structure, protects ICs against ESD pulses of all modes in all... Show moreAn all-mode, bonding pad-oriented ESD (electrostatic discharge) protection structure, protects ICs against ESD pulses of all modes in all directions. A unique quasi-symmetrical layout design is devised to improve ESD structure. Physical symmetry and rounded layout provide uniform current and thermal distribution as well as symmetrical electrical operation characteristics. The ESD structure allows tunable triggering voltage, low holding voltage, low impedance, low leakage, fast response time and low parasitic effect. The ESD structure can easily be placed under or surrounding a bonding pad and consumes little extra silicon. The ESD structure can be implemented in commercial BiCMOS processes and is suitable for multiple-supply, mixed-signal, parasitic-sensitive RF and high-pin-count ICs. Sponsorship: Illinois Institute of Technology United States Patent Show less
An overvoltage/overcurrent electrostatic discharge protection single circuit structure for Integrated Circuits protects on all paths and... Show moreAn overvoltage/overcurrent electrostatic discharge protection single circuit structure for Integrated Circuits protects on all paths and polarities between In/Out, Supply, and Ground pins. The structure is built on the chip substrate with an N well with three P Diffusions therein each containing N+ and P+ diffusions therein to form 6 transistors and 8 parasitic resistors to yield 5 thyristors. The structure provides very fast, symmetrical, full protection while using minimal chip area. Sponsorship: Illinois Institute of Technology United States Patent Show less
Query
(-) mods_name_creator_namePart_mt:"Wang, Albert Zihui"
