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CHARACTERIZATION OF GATE-ALL-AROUND FIELD EFFECT TRANSISTORS BASED ON BSIM-CMG MODEL
Title
CHARACTERIZATION OF GATE-ALL-AROUND FIELD EFFECT TRANSISTORS BASED ON BSIM-CMG MODEL
Creator
Yang, Muyu
Date
2018, 2018-05
Description
The objective of this thesis is to analyze the characteristics of gate-all-around (GAA) field-effect-transistors (FETs) based on BSIM-CMG ...
Show moreThe objective of this thesis is to analyze the characteristics of gate-all-around (GAA) field-effect-transistors (FETs) based on BSIM-CMG (Berkeley Short-channel IGFET Model Common Multi-Gate) compact model. As devices continue scaling according to Moore’s Law, traditional planar multi-gated MOSFET cannot suppress the short-channel effects (SCE). The GAA FETs structure is a good candidate for sub-7nm technology nodes because of its’ electrostatic gate control and the ability to suppress the SCE. In this thesis, two different kinds of GAA FETs, Lateral GAA FETs (LGAA FETs) and Vertical GAA FETs (VGAA FETs), are characterized and compared with multi-gate FinFETs. The devices implemented in this thesis are all based on BSIM-CMG compact models from Berkeley BSIM Group and PTM-MG compact models from Nanoscale Integration and Modeling (NIMO) Group. In this dissertation, LGAA FETs and VGAA FETs are compared with double-gate FinFETs, triple-gate FinFETs and quadruple-gate FinFETs. Firstly, both N-type and P-type of devices are characterized for a variety of parameters to investigate their properties. Then basic logic gates, i.e. Inverter, NOR and NAND, are created based on GAA FETs and multi-gate FinFETs, and simulated for comparison. Finally, an extended datapath study was done by implementing several full adder designs, including the traditional 28T mirror adder, the 9A adder, the 13A adder, the SERF adder, the CLRCL adder, the HULPFA adder, and the ULPFA adder. Simulation results confirm that LGAA FETs and VGAA FETs have substantially smaller leakage current and dynamic power consumption but slightly increased delay when compared with traditional planar multi-gate FinFETs.comparison. Finally, an extended datapath study was done by implementing several full adder designs, including the traditional 28T mirror adder, the 9A adder, the 13A adder, the SERF adder, the CLRCL adder, the HULPFA adder, and the ULPFA adder. Simulation results confirm that LGAA FETs and VGAA FETs have substantially smaller leakage current and dynamic power consumption but slightly increased delay when compared with traditional planar multi-gate FinFETs.
M.S. in Electrical Engineering, May 2018
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SWITCHING OSCILLATION OF HIGH-FREQUENCY WIDE BANDGAP POWER SEMICONDUCTOR DEVICES
Title
SWITCHING OSCILLATION OF HIGH-FREQUENCY WIDE BANDGAP POWER SEMICONDUCTOR DEVICES
Creator
Liu, Tianjiao
Date
2018, 2018-05
Description
Wide bandgap (WBG) power semiconductor devices can operate at high voltage, high switching frequency and high temperature. However, the...
Show moreWide bandgap (WBG) power semiconductor devices can operate at high voltage, high switching frequency and high temperature. However, the extremely fast switching characteristics, when combining parasitic components from the device package and power electronics circuit, are unfortunately accompanied by undesirable switching oscillations. In this thesis, switching oscillations observed in the WBG devices are studied. Firstly, a survey on oscillations in the general high-frequency power electronics circuit is carried out including the impacts of oscillation, causes of oscillation and mitigation of oscillation. Moreover, theoretical studies of the WBG switching performance and switching oscillations are performed based on spectrum analysis. The mathematical derivation reveals that the oscillation tends to enhance certain regions in the electromagnetic interference (EMI) spectrum by inducing a noise peak. In addition, modeling and analysis of silicon carbide (SiC) MOSFET switching oscillations are presented by developing equivalent circuit models for the turn-on and turn-off switching, respectively. Damping techniques design guidelines are provided based on the modeling analysis. Last but not least, a new technique to accurately characterize the parasitic inductances of power devices in discrete and module packages based on two-port scattering (S) parameters measurement is proposed. The approach is first verified with high frequency circuit simulation and then experimentally validated through case studies of a number of discrete devices and power modules.
Ph.D. in Electrical Engineering, May 2018
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