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Reconfigurable High-Performance Computation and Communication Platform for Ultrasonic Applications
Title
Reconfigurable High-Performance Computation and Communication Platform for Ultrasonic Applications
Creator
Wang, Boyang
Date
2021
Description
In industrial and medical applications, ultrasonic signals are used in nondestructive testing (NDT), medical imaging, navigation, and...
Show moreIn industrial and medical applications, ultrasonic signals are used in nondestructive testing (NDT), medical imaging, navigation, and communication. This study presents the architecture of high-performance computational systems designed for ultrasonic nondestructive testing, data compression using machine learning, and a multilayer perceptron neural network for ultrasonic flaw detection and grain size characterization. We researched and developed a real-time software-defined ultrasonic communication system for transmitting information through highly reverberant and dispersive solid channels. Orthogonal frequency-division multiplexing is explored to combat the severe multipath effect in the solid channels and achieve an optimal bitrate solution. In this study, a reconfigurable, high-performance, low-cost, and real-time ultrasonic data acquisition and signal processing platform is designed based on an all-programmable system-on-chip (APSoC). We designed the unsupervised learning models using wavelet packet transformation optimized by convolutional autoencoder for massive ultrasonic data compression. The proposed learning models can achieve a compression accuracy of 98% by using only 6% of the original data. For ultrasonic signal analysis in NDT applications, we utilized the multilayer perceptron neural network (MLPNN) to detect flaw echoes masked by strong microstructure scattering noise (i.e., about zero dB SNR or less) with detection accuracy above 99%. It is of high interest to characterize materials using ultrasonic scattering properties for grain size estimation and classification. We successfully designed an MLPNN to classify the grain sizes of materials with an accuracy of 99%. Furthermore, a software-defined ultrasonic communication system based on the APSoC is designed for real-time data transmission through solid channels. Transducers with a center frequency of 2.5 MHz are used to transmit and receive information-bearing ultrasonic waves in solid channels where the communication bit rate can reach up to 1.5 Mbps.
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RECONFIGURABLE ULTRASONIC SIGNAL PROCESSING SYSTEM SOLUTION BASED ON ZYNQ PLATFORM
Title
RECONFIGURABLE ULTRASONIC SIGNAL PROCESSING SYSTEM SOLUTION BASED ON ZYNQ PLATFORM
Creator
Wang, Boyang
Date
2015, 2015-05
Description
Ultrasonic systems are widely used in industrial and medical diagnostics ap- plications. However, an ultrasonic system has very strict...
Show moreUltrasonic systems are widely used in industrial and medical diagnostics ap- plications. However, an ultrasonic system has very strict requirements on signal capturing and processing speed because of the high frequency of the target signal. The objective of this thesis was to design an ultrasonic system including signal capturing and processing on Zynq System-On-Chip (SoC). Zynq SoC is a new technology from Xilinx which integrates both dual core ARM processors and FPGA on the same chip. This not only allows for hardware and software co-design, but also enables the I/O extensions on Zynq from FPGA. An Analog Front End (AFE) is used to gener- ate, transmit, receive, and amplify the ultrasonic signal. The AFE is controlled by a Zynq processor via Serial Peripheral Interface (SPI) and several separate control lines from General Purpose I/O(GPIO). A high speed Analog to Digital Converter (ADC) is used in the system to capture the high speed ultrasonic echo received by AFE. The ADC which is controlled through SPI, communicates with the Zynq processor by Direct Memory Access (DMA). Besides hardware platform con guration, Discrete Wavelet Transform (DWT) based compression algorithm was implemented and optimized using different methods in order to find out the best solution for realizing on the Zynq SoC. Initially, MATLAB was used to explore and verify the algorithm. Then the algorithm was implemented in hardware using VHDL language, and in soft-ware using C++. Furthermore, the compression algorithm was implemented in Open Computer Language (OpenCL) using hardware and software co-design method.
M.S. in Electrical Engineering, May 2015
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