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INTELLIGENT SOLID STATE CIRCUIT BREAKERS USING WIDE BANDGAP SEMICONDUCTORS
Title
INTELLIGENT SOLID STATE CIRCUIT BREAKERS USING WIDE BANDGAP SEMICONDUCTORS
Creator
Zhou, Yuanfeng
Date
2021
Description
Electricity, in its predominant form of alternating current (AC), is at the heart of modern civilization. However, direct current (DC)...
Show moreElectricity, in its predominant form of alternating current (AC), is at the heart of modern civilization. However, direct current (DC) electricity is re-emerging, offering higher transmission efficiency, better system stability, better match with modern electrical loads, and easier integration of renewable and storage resources than AC. DC power is gaining tractions in HVDC or MVDC grids, DC data centers, photovoltaic farms, EV charging infrastructures, shipboard, and aircraft power systems. However, DC fault protection remains a major challenge. Interruption of DC currents is extremely difficult due to the lack of current zero crossings which are naturally available in AC power systems. Conventional mechanical breakers only offer a very limited DC current interruption capability even after significant power derating. Hybrid circuit breakers (HCBs) offers a relatively low conduction loss but a response time too slow to protect many low-impedance DC grids. Solid state circuit breakers (SSCBs) can quickly interrupt a DC fault current within tens of microseconds but suffer from high conduction losses. Furthermore, it is generally difficult for an SSCB to distinguish between a short circuit fault and a normal inrush current condition during the start-up of a capacitive load.The purpose of this thesis is to develop a tri-mode, intelligent solid-state circuit breaker technology using wide bandgap semiconductors (especially Gallium Nitride transistors), referred to as iBreaker. The iBreaker design methodology includes the use of mΩ-resistance GaN and SiC devices, new circuit topology and control techniques beyond the commonly used ON/OFF switch configuration, and integration of intelligent functions without increasing component count. The iBreaker adopts a distinct pulse width modulation (PWM) current limiting (PWM-CL) state in addition to the conventional ON and OFF states to facilitate soft startup, fault authentication, and fault location functions. Key design elements, such as use of wide bandgap (particularly GaN) switches, tri-mode operation, combined digital and analog control, the bidirectional buck topology, variable PWM frequency control and universal hardware/software architecture, are discussed in detail. Multiple iBreaker prototypes, rated at 380 V/20 A and 1000 V/10 A, respectively, are built and tested to validate the proposed SSCB design concept. 99.95% transmission efficiency, passive cooling, and μs-scale response time are demonstrated experimentally.
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WIDE BANDGAP FRACTIONAL POWER PROCESSING
Title
WIDE BANDGAP FRACTIONAL POWER PROCESSING
Creator
Kundu, Aritra
Date
2022
Description
The adoption of wide bandgap (WBG) power semiconductors can improve the performance of power converters at the expense of significantly higher...
Show moreThe adoption of wide bandgap (WBG) power semiconductors can improve the performance of power converters at the expense of significantly higher cost than Si at present time. In this thesis, an innovative Wide bandgap Fractional Power Processing (WFPP) design concept is introduced where silicon devices process the base power at a low switching frequency (2kHz or lower) while WBG devices are judiciously used to process only a fraction of the total power at a much higher frequency (tens of kHz). WFPP inverter is a design concept that splits the power processing into a low frequency Si base power processor and a high-frequency WBG fractional power processor. WBG devices are therefore judiciously used to process only a fraction of the total power to achieve both high-efficiency and lower cost than a full-WBG converter design. This thesis investigates an optimization strategy to minimize the total power loss while maintaining a reasonable THD and cost for a hybrid inverter design with comprehensive power loss analysis and calculation on fundamental and harmonics currents. Optimal selection of power sharing between the Si and WBG inverters and switching frequency are discussed in the thesis. The circulating current paths in topology with hybrid switching frequencies are also analyzed and presented in this thesis. Experimental results on a 9kW SiC/Si hybrid inverter prototype with isolated and non-isolated DC power supplies are presented to validate the design concept.
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