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- FINFET BASED STANDARD CELL LIBRARY CHARACTERIZATION
- Yuan, Yu
- 2015, 2015-07
In this work, four standard cell libraries based on FinFET technology have been characterized and implemented. The first library uses the BSIM...
Show moreIn this work, four standard cell libraries based on FinFET technology have been characterized and implemented. The first library uses the BSIM-CMG and PTM-MG models, which represents the common multi-gate devices. Two libraries are based on the BSIM-IMG model, operating in short-gate (corresponding to low-Vt) mode and lowpower (corresponding to high-Vt) mode separately. Synthesis and simulation of BSIMCMG based library is presented and compared to the conventional 45nm CMOS library, FreePDK45. The results show acceptable accuracy of the library based on BSIM-CMG model. For the libraries based on BSIM-IMG model, Short-Gate (SG) mode, Low-Power (LP) mode and the mixed-mode (combining both SG and LP modes) have been analyzed. The results proved that the low-power independent multi-gate FinFET can be used for leakage power reduction, just like the bulk CMOS high-Vt devices. At the end of this work, another library based on CCS model was characterized and verified, which show far better accuracy in terms of both timing and power modeling.
M.S. in Electrical Engineering, July 2015
- Leakage Power Attack-Resilient Designs of A SRAM Cell in 7nm FinFET Technology
- Chen, Kangqi
Recently, the classic metal-oxide-semiconductor field-effect-transistor (MOS- FET) has reached its limit for scaling. Another transistor...
Show moreRecently, the classic metal-oxide-semiconductor field-effect-transistor (MOS- FET) has reached its limit for scaling. Another transistor structure, FinFET, gradually has become the alternative choice for next generation of integrated circuits. Excellent features like reduced short channel effects, low threshold-voltage variability, less random dopant fluctuation, etc, offer this transistor model more stability, less leakage and faster performance. In particular, scaling trends force SRAM cells to be more vulnerable while using conventional MOSFET. The application of FinFET helps SRAM cell designs to overcome stability issues and achieve less power and faster speed. Another critical feature of an SRAM cell that needs to be considered is the correlation between data stored in cell and leakage of this cell. Side-Channel Attacks (SCA) like Leakage Power Analysis (LPA) would exploit this correlation to decrypt the secret key inside the memory. SCA has been proved to be a non-invasive but dangerous threat. Therefore, LPA would be the main focus of this thesis research.In this thesis, firstly, threshold voltage of various models are investigated using fundamental logic circuits including full-adders built with pass transistors, CLRCL and SERF. Secondly, conventional 6T SRAM cell design and single-ended 9T SRAM cell design targeting high stability and low power, are implemented and compared. Thirdly, the leakage balance method is applied to 9T cell design. Two novel solutions for LPA prevention of 9T design are proposed, implemented and compared against the original 9T design and conventional 6T design. The results confirm improved leakage balance and attack resilience while maintaining the stability and low-power features of the original 9T SRAM cell.