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CHARACTERIZATION OF A NOVEL TUMOR SUPPRESSOR BAX
Title
CHARACTERIZATION OF A NOVEL TUMOR SUPPRESSOR BAX
Creator
Wang, Xin
Date
2013-04-16, 2013-05
Description
Bax is a pro-death tumor suppressor. The loss of functional Bax expression can enhance the tumor growth. Recently we discovered a new family...
Show moreBax is a pro-death tumor suppressor. The loss of functional Bax expression can enhance the tumor growth. Recently we discovered a new family of functional Bax isoforms generated specifically in certain tumors; one of them is Bax 2 . In this thesis, I characterized the properties of Bax 2 protein by comparing with the parental Bax 2. Bax 2 was cloned into a GFP mammalian expression vector and transfected into the bax knockout cells. I examined Bax 2 expression, cellular distribution, and ability to induce cell death. The results show that the Bax 2 protein aggregated as granules around the nucleus in cytoplasm and induced more cell death than that from previously studied Bax 2. The results implicate that cancer patients with Bax 2 isoform might have better prognosis or response to treatment.
M.S. in Biology, May 2013
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Heterogeneous Workloads Study towards Large-scale Interconnect Network Simulation
Title
Heterogeneous Workloads Study towards Large-scale Interconnect Network Simulation
Creator
Wang, Xin
Date
2023
Description
High-bandwidth, low-latency interconnect networks play a key role in the design of modern high- performance computing (HPC) systems. The ever...
Show moreHigh-bandwidth, low-latency interconnect networks play a key role in the design of modern high- performance computing (HPC) systems. The ever-increasing need for higher bandwidth and higher message rate has driven the design of low-diameter interconnect topologies like variants of dragonfly. As these hierarchical networks become increasingly dominant, interference caused by resource sharing can lead to significant network congestion and performance variability. Meanwhile, with the rapid growth of the machine learning applications, the workloads of future HPC systems are anticipated to be a mix of scientific simulation, big data analytics, and machine learning applications. However, little work has been conducted to understand performance implications of co-running heterogeneous workloads on large-scale dragonfly systems. There is a greater need to study how different interconnect technologies affect workload performance, and how conventional scientific applications interact with emerging big data applications at the underlying interconnect level. In this work, we firstly present a comparative analysis exploring the communication interference for traditional HPC applications by analyzing the trade-off between localizing communication and balancing network traffic. We conduct trace-based simulations for applications with different communication patterns, using multiple job placement policies and routing mechanisms. Then we develop a scalable workload manager that provides an automatic framework to facilitate hybrid workload simulation. We investigate various hybrid workloads and navigate various application-system configurations for a deeper understanding of performance implications of a diverse mix of workloads on current and future supercomputers. Finally, we propose a scalable framework, Union+, that enables simulation of communication and I/O simultaneously. By combining different levels of abstraction, Union+ is able to efficiently co-model the communication and I/O traffic on HPC systems that equipped with flash-based storage. We conduct experiments with different system configurations, showing how Union+ can help system designers to assess the usefulness of future technologies in next-generation HPC machines.
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Heterogeneous Workloads Study towards Large-scale Interconnect Network Simulation
Title
Heterogeneous Workloads Study towards Large-scale Interconnect Network Simulation
Creator
Wang, Xin
Date
2023
Description
High-bandwidth, low-latency interconnect networks play a key role in the design of modern high- performance computing (HPC) systems. The ever...
Show moreHigh-bandwidth, low-latency interconnect networks play a key role in the design of modern high- performance computing (HPC) systems. The ever-increasing need for higher bandwidth and higher message rate has driven the design of low-diameter interconnect topologies like variants of dragonfly. As these hierarchical networks become increasingly dominant, interference caused by resource sharing can lead to significant network congestion and performance variability. Meanwhile, with the rapid growth of the machine learning applications, the workloads of future HPC systems are anticipated to be a mix of scientific simulation, big data analytics, and machine learning applications. However, little work has been conducted to understand performance implications of co-running heterogeneous workloads on large-scale dragonfly systems. There is a greater need to study how different interconnect technologies affect workload performance, and how conventional scientific applications interact with emerging big data applications at the underlying interconnect level. In this work, we firstly present a comparative analysis exploring the communication interference for traditional HPC applications by analyzing the trade-off between localizing communication and balancing network traffic. We conduct trace-based simulations for applications with different communication patterns, using multiple job placement policies and routing mechanisms. Then we develop a scalable workload manager that provides an automatic framework to facilitate hybrid workload simulation. We investigate various hybrid workloads and navigate various application-system configurations for a deeper understanding of performance implications of a diverse mix of workloads on current and future supercomputers. Finally, we propose a scalable framework, Union+, that enables simulation of communication and I/O simultaneously. By combining different levels of abstraction, Union+ is able to efficiently co-model the communication and I/O traffic on HPC systems that equipped with flash-based storage. We conduct experiments with different system configurations, showing how Union+ can help system designers to assess the usefulness of future technologies in next-generation HPC machines.
Show less