In this study, a Support Vector Machine (SVM) classification method used for analyzing Ultrasound signals is implemented by FPGAs based on... Show moreIn this study, a Support Vector Machine (SVM) classification method used for analyzing Ultrasound signals is implemented by FPGAs based on Xilinx Zynq SoC. The SVM processor aims at classifying A-scan data obtained by an ultrasonic sensor. For reducing development time, hardware software co-design tools such as Xilinx System Generator and Vivado have been used. SVM kernel function is implemented by DSP slices and block RAMs. Advanced Extensible Interface bridges the ARM core and FPGAs for more convenient communication. The main objective of this study is to achieve robust detection of ultrasonic flaw echoes in real-time using an SVM algorithm. The implementation on the FPGA shows that the architecture can be realized with a Xilinx Zedboard FPGA. It runs at 100MHz clock frequency and can calculate the SVM classification for 1024 feature space points under 0.02ms. M.S. in Electrical Engineering, December 2016 Show less
