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RECONFIGURABLE SYSTEM-ON.CHIP SOLUTION FOR ULTRASONIC IMAGING APPLICATIONS
Title
RECONFIGURABLE SYSTEM-ON.CHIP SOLUTION FOR ULTRASONIC IMAGING APPLICATIONS
Creator
Gal, Paul
Date
2015, 2015-12
Description
Ultrasonic system have evolved from a basic single transducer system to full arrays capable of 3-dimensional scans. These advanced systems are...
Show moreUltrasonic system have evolved from a basic single transducer system to full arrays capable of 3-dimensional scans. These advanced systems are design for specific applications and target materials. These systems need to be able to process the vast amount of data that is generated while maintaining portability a flexible and reconfigurable system. Specific hardware accelerators are built to perform ultrasonic signal processing quickly and efficiently. This system allows for a variety of parameters like signal lengths and processing characteristics to be reconfigurable to allow for flexibility for different applications. A system is developed to provide an effective storage and data transfer system which will allows researchers to quickly gather data. Specific compression and reconstruction algorithms are implemented as accelerators to increase the systems overall performance. For data transfer a simple Real Time Operating System and Ethernet connective is developed. This is all implemented on the ZEDBoard Zynq SoC for maximum flexibility and performance.Ultrasonic system have evolved from a basic single transducer system to full arrays capable of 3-dimensional scans. These advanced systems are design for specific applications and target materials. These systems need to be able to process the vast amount of data that is generated while maintaining portability a flexible and reconfigurable system. Specific hardware accelerators are built to perform ultrasonic signal processing quickly and efficiently. This system allows for a variety of parameters like signal lengths and processing characteristics to be reconfigurable to allow for flexibility for different applications. A system is developed to provide an effective storage and data transfer system which will allows researchers to quickly gather data. Specific compression and reconstruction algorithms are implemented as accelerators to increase the systems overall performance. For data transfer a simple Real Time Operating System and Ethernet connective is developed. This is all implemented on the ZEDBoard Zynq SoC for maximum flexibility and performance.Ultrasonic system have evolved from a basic single transducer system to full arrays capable of 3-dimensional scans. These advanced systems are design for specific applications and target materials. These systems need to be able to process the vast amount of data that is generated while maintaining portability a flexible and reconfigurable system. Specific hardware accelerators are built to perform ultrasonic signal processing quickly and efficiently. This system allows for a variety of parameters like signal lengths and processing characteristics to be reconfigurable to allow for flexibility for different applications. A system is developed to provide an effective storage and data transfer system which will allows researchers to quickly gather data. Specific compression and reconstruction algorithms are implemented as accelerators to increase the systems overall performance. For data transfer a simple Real Time Operating System and Ethernet connective is developed. This is all implemented on the ZEDBoard Zynq SoC for maximum flexibility and performance.
M.S. in Electrical Engineering, December 2015
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END-TO-END WIRELESS DIGITAL COMMUNICATION SYSTEM OF FPGA BASED SOFTWARE DEFINED RADIO
Title
END-TO-END WIRELESS DIGITAL COMMUNICATION SYSTEM OF FPGA BASED SOFTWARE DEFINED RADIO
Creator
Dang, Tuan
Date
2017, 2017-05
Description
This thesis describes the design and implementation of an End-to- End digital wireless communication system (E2E) system on the ZedBoard Zynq...
Show moreThis thesis describes the design and implementation of an End-to- End digital wireless communication system (E2E) system on the ZedBoard Zynq-7000 Field Pro- grammable Gate Array (FPGA) Development Board with an Analog Devices AD9364 Wideband Transceiver from a model-based design system. Furthermore, we present the design path to reconfigure the software controlled logic blocks for additional functionality such that the E2E system could be rapidly redeployed. A comparison BER vs. distance plot between the QPSK-1/2 and uncoded QPSK shows QPSK-1/2 with BER = 0 up to 14 m while no FEC QPSK has minimum BER ~ 10-5 up to the same distance.
M.S. in Electrical Engineering, May 2017
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DEEP LEARNING AND COMPUTER VISION FOR INDUSTRIAL APPLICATIONS: CELLULAR MICROSCOPIC IMAGE ANALYSIS AND ULTRASOUND NONDESTRUCTIVE TESTING
Title
DEEP LEARNING AND COMPUTER VISION FOR INDUSTRIAL APPLICATIONS: CELLULAR MICROSCOPIC IMAGE ANALYSIS AND ULTRASOUND NONDESTRUCTIVE TESTING
Creator
Yuan, Yu
Date
2022
Description
For decades, researchers have sought to develop artificial intelligence (AI) systems that can help human beings on decision making, data...
Show moreFor decades, researchers have sought to develop artificial intelligence (AI) systems that can help human beings on decision making, data analysis and pattern recognition applications where analytical methods are ineffective. In recent years, Deep Learning (DL) has been proven to be an effective AI technique that can outperform other methods in applications such as computer vision, natural language processing, autonomous driving. Realizing the potential of deep learning techniques, researchers have also started to apply deep learning on other industrial applications. Today, deep learning based models are used to innovate and accelerate automation, guidance, and decision making in various industries including automotive industry, pharmaceutical industry, finance, agriculture and more. In this research, several important industrial applications (on Biomedicine and Non-Destructive Testing) utilizing deep learning algorithms will be introduced and analyzed. The first biopharmaceutical application focuses on developing a deep learning based model to automate the visual inspection process in Median Tissue Culture Infectious Dose(TCID50). TCID50 is one of the most popular methods for viral quantification. An important step of TCID50 is to visually inspect the sample and decide if it exhibits cytopathic effect(CPE) or not. Two novel models have been developed to detect CPE in microscopic images of cell culture in 96 well-plates. The first model consists of a convolutional neural network (CNN) and support vector machine(SVM). The second model is a fully convolutional network (FCN) followed by morphological post-processing steps. The models are tested on 4 cell lines and achieve very high accuracy. Another biopharmaceutical application developed for cellular microscopic images is the clonal selection. Clonal selection is one of the mandatory steps in cell line development process. It focuses on verifying the clonality of the cell culture. The researchers used to visually inspect the microscopic images to verify the clonality. In this work, a novel deep learning based model and a workflow is developed to accelerate the process. This algorithm consists of multiple steps, including image analysis after incubation to detect the cell colonies, and verify its clonality in day0 image. The results and common mis-classification cases are shown in this thesis. Image analysis method is not the only technology that has been advancing for cellular image analysis in biopharmaceutical industry. A new class of instruments are currently used in biopharmaceutical industry which enable more opportunities for image analysis. To make the most of these new instruments, a convolutional neural network based architecture is used to perform accurate cell counting and cell morphology based segmentation. This analysis can provide more insight of the cells at very early stage in characterization process of cell line development. The architecture and the testing results are presented in this work. The proposed algorithm has achieved very high accuracy on both applications, and the cell morphology based segmentation enables a brand new feature for scientists to predict the potential productivity of the cells. Next part of this dissertation is focused on hardware implementation of Ultrasonic Non-Destructive Testing (NDT) methods based on deep learning, which can be highly useful in flaw detection and classification applications. With the help of a smart and mobile Non-Destructive Testing device, engineers can accurately detect and locate the flaws inside the materials without reliance on high performance computation resources. The first NDT application presents a hardware implementation of a deep learning algorithm on Field-programmable gate array(FPGA) for Ultrasound flaw detection. The Ultrasound flaw detection algorithm consists of a wavelet transform followed by a LeNet inspired convolutional neural network called Ultra-LeNet. This work is focused on implementing the computationally difficult part of this algorithm: Ultra-LeNet, so that it can be used in the field where high performance computation resources (e.g., AWS) are not accessible. The implementation uses resource partitioning to design two dedicated pipelined accelerators for convolutional layers and fully connected layers respectively. Both accelerators utilize loop unrolling, loop pipelining and batch processing techniques to maximize the throughput. The comparison to other work has shown that the implementation has achieved higher hardware utilization efficiency. The second NDT application is also focused on implementing a deep learning based algorithm for Ultrasound flaw detection on a FPGA. Instead of implementing the Ultra-LeNet, the deep learning model used in this application is Meta-learning based Siamese Network, which is capable for multi-class classification and it can also classify a new class even if it does not appear in the training dataset with the help of automated learning features. The hardware implementation is significantly different than the previous algorithm. In order to improve the inference operation efficiency, the model is compressed with both pruning and quantization, and the FPGA implementation is specifically designed to accelerate the compressed CNN with high efficiency. The CNN model compression method and hardware design are novel methods introduced in this work. Comparison against other compressed CNN accelerators is also presented.
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