creator Sun, Xian-he creator Chen, Yong creator Zhu, Huaiyu A method and apparatus for prefetching data from memory for a multicore data processor. A prefetcher issues a plurality of requests to prefetch data from a memory device to a memory cache. Consecutive cache misses are recorded in response to at least two of the pluarlity requests. A time between the cache misses is determined and a timing of a further request to prefetch data from the memory device to the memory cache is altered as a function of the determined time between the two cache misses. Submitted by Aric Ahrens (ahrens@iit.edu) on 2014-10-08T14:45:15Z No. of bitstreams: 2 license_rdf: 1089 bytes, checksum: 0a703d871bf062c5fdc7850b1496693b (MD5) 8856452.pdf: 580967 bytes, checksum: de10a8d43a0b3264a253427150a93c46 (MD5) Made available in DSpace on 2014-10-08T14:45:15Z (GMT). No. of bitstreams: 2 license_rdf: 1089 bytes, checksum: 0a703d871bf062c5fdc7850b1496693b (MD5) 8856452.pdf: 580967 bytes, checksum: de10a8d43a0b3264a253427150a93c46 (MD5) Previous issue date: 2014-10-07 Illinois Institute of Technology 2014-10-08 2014-10-07 8,856,452 http://hdl.handle.net/10560/3273 en CC0 1.0 Universal http://creativecommons.org/publicdomain/zero/1.0/ United States Patent Patent reformatted digital application/pdf No Copyright - United States http://rightsstatements.org/page/NoC-US/1.0/ Open Access