
<oai_dc:dc xmlns:oai_dc="http://www.openarchives.org/OAI/2.0/oai_dc/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.openarchives.org/OAI/2.0/oai_dc/ http://www.openarchives.org/OAI/2.0/oai_dc.xsd">
  <dc:title>Single Structure All-Direction ESD Protection for Integrated Circuits</dc:title>
  <dc:creator>Wang, Albert Zihui</dc:creator>
  <dc:description>An overvoltage/overcurrent electrostatic discharge protection single circuit structure for Integrated Circuits protects on all paths and polarities between In/Out, Supply, and Ground pins. The structure is built on the chip substrate with an N well with three P Diffusions therein each containing N+ and P+ diffusions therein to form 6 transistors and 8 parasitic resistors to yield 5 thyristors. The structure provides very fast, symmetrical, full protection while using minimal chip area.</dc:description>
  <dc:description>Sponsorship: Illinois Institute of Technology</dc:description>
  <dc:description>United States Patent</dc:description>
  <dc:date>2009-05-14</dc:date>
  <dc:date>2003-01-28</dc:date>
  <dc:type>Patent</dc:type>
  <dc:format>application/pdf</dc:format>
  <dc:identifier>islandora:9792</dc:identifier>
  <dc:identifier>6,512,662</dc:identifier>
  <dc:identifier>http://hdl.handle.net/10560/2440</dc:identifier>
  <dc:language>en</dc:language>
  <dc:rights>No Copyright - United States</dc:rights>
  <dc:rights>http://rightsstatements.org/page/NoC-US/1.0/</dc:rights>
  <dc:rights>Open Access</dc:rights>
</oai_dc:dc>