creator Moninuola, Olufola advisor Xu, Yang Real-time imaging radar design for human feature extraction is an emerging field that requires radar architectures with short dwell time, high resolution and low hardware complexity. The Successive Multi Frequency Continuous Wave (S-MFCW) technique has been proposed as a suitable architecture to achieve a comparable resolution with the Frequency Modulated Continuous Wave (FMCW) technique without sacrificing short dwell time and low hardware complexity. The hardware complexity and power consumption of these two techniques were investigated in this work. Two processor designs based on Read Only Memory (ROM) lookup tables and Coordinate Rotation Digital Computer (CORDIC) algorithm were implemented for the SMFCW technique on Xilinx’s Virtex-6 Field Programmable Gate Array (FPGA) and compared with the Fast Fourier Transform (FFT) implementation of the FMCW technique. Hardware complexity comparisons were based on the amount of FPGA resources utilized in each design while power consumption results were generated after place and route. The CORDIC-based implementation of the S-MFCW technique was found to reduce the hardware complexity of the FMCW technique by a factor of three while the ROM implementation was found to consume the least power. Submitted by Liana Khananashvili (khananashvili@iit.edu) on 2013-10-10T15:27:23Z No. of bitstreams: 1 FINAL_THESIS.pdf: 1297165 bytes, checksum: 90a29cc990c2ebea6ccd09722c0ce5a9 (MD5) Made available in DSpace on 2013-10-10T15:27:23Z (GMT). No. of bitstreams: 1 FINAL_THESIS.pdf: 1297165 bytes, checksum: 90a29cc990c2ebea6ccd09722c0ce5a9 (MD5) Previous issue date: 2013-05 M.S. in Electrical Engineering, May 2013 2013-04-30 2013-05 http://hdl.handle.net/10560/3084 en Thesis born digital application/pdf In Copyright http://rightsstatements.org/page/InC/1.0/ Restricted Access ECE / Electrical and Computer Engineering Illinois Institute of Technology Affiliated department