creator Rarick, Samuel advisor Saniie, Jafar The Advanced Encryption Standard (AES) is a symmetric encryption algorithm used by the United States government to protect sensitive information. In this study, three implementations of a 256-bit AES algorithm are presented to accelerate the computational elements of the algorithm: a low-area, high-performance, and hybrid implementation. The three implementations were developed for the ZedBoard development board which contains a Zynq-7000 SoC. The Zynq-7000 SoC contains both a processing system (dual-core ARM processor) and programmable logic (Xilinx-7 FPGA). This relation between hardware and software of the Zynq-7000 SoC was exploited by implementing the key schedule algorithm of AES on the dual-core ARM processor, while implementing the AES encryption core on the Xilinx-7 FPGA. A high-level synthesis design flow was followed for its flexibility and reduction of development time. The result for latency is about a 2.5 times acceleration for the low-area implementation, a 12 times acceleration for the hybrid implementation, and a 44 times acceleration for the high-performance implementation. For the area results, the high-performance implementation can theoretically fit 13 encryption cores on the ZedBoard, while both the low-area and hybrid implementations can theoretically fit 35 encryption cores on the ZedBoard. Submitted by Erma Thomas (thomase@iit.edu) on 2019-05-13T18:48:59Z No. of bitstreams: 1 etdadmin_upload_577376.zip: 1644129 bytes, checksum: 2012ed7894920d588a8471647b674d2d (MD5) Made available in DSpace on 2019-05-13T18:48:59Z (GMT). No. of bitstreams: 1 etdadmin_upload_577376.zip: 1644129 bytes, checksum: 2012ed7894920d588a8471647b674d2d (MD5) Previous issue date: 2018-05 M.S. in Computer Engineering, May 2018 2018 2018-05 http://hdl.handle.net/10560/4405 en Advanced Encryption Standard Cryptography Hardware Acceleration Hardware Software Co-design High-Level Synthesis ZYNQ SoC Thesis born digital application/pdf In Copyright http://rightsstatements.org/page/InC/1.0/ Restricted Access