RECONFIGURABLE ULTRASONIC SIGNAL PROCESSING SYSTEM SOLUTION BASED ON ZYNQ PLATFORM
Ultrasonic systems are widely used in industrial and medical diagnostics ap- plications. However, an ultrasonic system has very strict requirements on signal capturing and processing speed because of the high frequency of the target signal. The objective of this thesis was to design an ultrasonic system including signal capturing and processing on Zynq System-On-Chip (SoC). Zynq SoC is a new technology from Xilinx which integrates both dual core ARM processors and FPGA on the same chip. This not only allows for hardware and software co-design, but also enables the I/O extensions on Zynq from FPGA. An Analog Front End (AFE) is used to gener- ate, transmit, receive, and amplify the ultrasonic signal. The AFE is controlled by a Zynq processor via Serial Peripheral Interface (SPI) and several separate control lines from General Purpose I/O(GPIO). A high speed Analog to Digital Converter (ADC) is used in the system to capture the high speed ultrasonic echo received by AFE. The ADC which is controlled through SPI, communicates with the Zynq processor by Direct Memory Access (DMA). Besides hardware platform con guration, Discrete Wavelet Transform (DWT) based compression algorithm was implemented and optimized using different methods in order to find out the best solution for realizing on the Zynq SoC. Initially, MATLAB was used to explore and verify the algorithm. Then the algorithm was implemented in hardware using VHDL language, and in soft-ware using C++. Furthermore, the compression algorithm was implemented in Open Computer Language (OpenCL) using hardware and software co-design method.